In the structure of a trench Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or other types of vertical MOSFET, the gate region of the transistor is formed on top of substrate, e.g. in a trench of a trenched MOSFET, and the source region and the drain region are formed on both sides of the substrate of the MOSFET, respectively. This type of vertical MOSFET allows high current to pass from the drain on backside of the substrate to the source through a channel with gate bias voltage for turning on channel region.
Referring to FIGS. 1 and 2, in the gate region of the said trench MOSFET of prior arts, a device (100) which is a semiconductor with an epitaxial layer (101) on the upper part thereof, and doped polysilicon (102) is formed in a corresponding gate trench (103). In most case, a ploy merging line (104) is formed in the middle of the gate trench (103) while the doped polysilicon (102) is deposited into and filled the gate trench (103). Before refill contact with W Plug or Al alloys, a gate contact hole (105), shown in FIG. 2, in the doped polysilicon (102) of the gate trench (103) is formed by silicon etch after contact oxide etch. However, the silicon etch for forming the gate contact hole (105) may etch through doped polysilicon (102) and gate oxide in the gate trench (103) due to heavily doped polysilicon inducing higher etch rate and the ploy merging line (104) further enhancing higher etch rate and contact the epitaxial layer (101). Therefore, the W plug or Al Alloys refilled into the gate contact trench will short through gate oxide and drain at trench bottom, causing shortage of the gate and the drain and reliability issues. The problem becomes more pronounced when the trench depth is shallower.
The present invention provides trench MOSFET with an etching buffer layer in a trench gate for gate metal contact to improves the lack of the prior art.